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工業技術研究院

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三維積體電路導通孔技術

技術簡介

 TSV技術。
TSV技術。

在3DIC技術上,開發所有矽導通孔相關的可行技術,透過垂直路徑導通上下晶片,增加晶片堆疊密度、縮小體積、加大頻寬、降低功耗與增進產品效能,目前已將不同方案整合在不同晶片上,如應用晶背via last矽導通孔製程整合技術(導通孔大小5μm,深度50μm)於SRAM與邏輯晶片的堆疊架構上,提升60%以上的系統效能,減少70%以上的功率消耗,而via middle 矽導通孔技術則成功與記憶體廠商完成四層8Gb的DDR3記憶體堆疊晶片。甚而進一步縮減晶片面積、提升系統效能、減少功率消耗、降低矽導通孔製造成本,成功完成3μm、深度30μm的矽導通孔製程整合技術的開發。



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