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工業技術研究院

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技術名稱: 合乎動態隨機記憶體使用之含高介電層之金屬-絕緣層-金屬電容技術

技術簡介

開發high-k MIM for DRAM capacitor 材料及電容元件之製程整合驗證技術,突破傳統材料有效厚度及漏電流限制,以符合下世代DRAM 電容元件之需要。

Abstract

Focused on material and process integration verification of “high-k MIM for DRAM capacitor”. This project was to solve the issues of leakage and equivalent oxide thickness (EOT) limitation of the capacitor and meet the target specs. of next generation DRAM.

技術規格

‧結構模組技術 EOT < 2.3nm;Thermal budget > 1000℃

Technical Specification

EOT < 2.3nm;Thermal budget > 1000℃

技術特色

使用High-k材料如HfO2夾入極薄之Al2O3以增加結晶溫度,並使用TiN金屬當電極,對業界下世代之MIM capacitor將有明顯的幫助,目前國際上並未被詳細探討,此領先國際創新構想對業界下世代之MIM capacitor將有明顯的幫助。

應用範圍

DRAM、eDRAM、矽半導體製程所製作之記憶體晶片

接受技術者具備基礎建議(設備)

具記憶體或foundry能力之半導體廠

接受技術者具備基礎建議(專業)

DRAM記憶體製程技術相關元件之設計、製造能力。

技術分類 製程

聯絡資訊

聯絡人:張順賢 奈米電子技術組

電話:03-5913917 或 Email:shchang@itri.org.tw

客服專線:+886-800-45-8899

傳真:03-5917690

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