工業技術研究院

技術簡介

處在數位匯流整合的時代中，多媒體影音服務可以透過各式各樣的異質網路來傳送給消費者，然而因應不同的網路傳輸頻寬與多樣化的終端接收產品，如何達到提供一致地接收影音內容的功能，異質網路影音編解碼技術的重要性與日益增。 本技術提供高解析度Scalable Video Coding (SVC)解碼技術與硬體核心IP，規格達到1920x1080與更新率達到每秒30張的非交錯畫面，並且其動態規模支援temporal、spatial與quality可調整等級，可因應不同的網路傳輸頻寬以及配合多樣化消費者終端產品，而且本硬體核心也支援既存的H.264 High Profile影片規格，使得開發成本需求較低且能維持高效能與高解析度的性能，符合異質網路上對多重規模與高解析品質解碼的需求。

Abstract

The H.264 SVC Profiles H/W Decoder Si-Soft IP explores a design for the Video Decoder, which is used for heterogeneous network multimedia application. The Video Decoder is compliant to ISO/IEC 14496-10 MPEG-4 AVC / ITU-T H.264 Standard and it supports Baseline Profile, Main Profile, and High Profile. Furthermore, the Video Decoder supports the Scalable Video Coding (SVC) extension, which is the amendment of H.264 Standard. With the flexibility of Soft-IP solution, ITRI can provide the industry with a high efficiency H.264 core technology for digital video, and to help our customers develop competitive time-to-market applications for scalable video.

技術規格

(1) Fully-hardware-type decoder: (2)1920x1088p (HD), 30 fps, 50M bps, YCbCr 420 forma (3) Supports ALL features in H.264 High Profile (4) Supports SVC features (5) Passes ITU-T H.264.1 conformance tests (6) Supports 32-bit, 64-bit, and 128-bit memory bus (7) Interfaces compliant to Altera Avalon Bus specification and AMBA AXI specification (8) ASIC-proven Silicon Soft Intellectual Property (IP) (9) Includes patent pending technologies, such as CABAC, run-level, de-blocking filter are applied.

Technical Specification

(1) Fully-hardware-type decoder, which is compliant to ITU-T: 　– H.264 Baseline, Main, and High Profiles, Level 4.1 　– SVC Scalable Baseline, Scalable High, and Scalable High-Intra Profiles, Level 4.1 (2) Picture resolution: 1920x1088p (HD), 30 fps, 50M bps, YCbCr 420 format (supports YV12 or NV12 format) (3) Supports ALL features in H.264 High Profile: 　– I/P/B-Slice, Interlaced Picture, 8x8 Intra Prediction, and 8x8 Inverse Transform 　– CABAC, Weighted Prediction, and Customized Quantization Matrix 　– Picture-/MB-level Adaptive Frame-Field (PIC-/MB-AFF) Structures 　– Up to 30 Reference Field-Pictures 　– Dedicated Hardware for Memory Management and Control Operations (MMCO) (4) Supports SVC features: 　– Temporal, Quality, and Spatial Scalabilities 　– Coarser Gain Scalability (CGS), Medium Gain Scalability (MGS), and Extended Spatial Scalability (ESS) 　– Inter-layer Intra, Residual, and Motion Predictions (5) Passes ITU-T H.264.1 conformance tests (total 174 cases, bit exactly matching) (6) Supports 32-bit, 64-bit, and 128-bit memory bus (w/wo dual-clock domains) (7) Total number of instructions for Host Processor is less than 0.01 MIPS, and no RISC core is used in this Soft-IP (save extra cost of license) (8) Interfaces compliant to Altera Avalon Bus specification and AMBA AXI specification (9) ASIC-proven Silicon Soft Intellectual Property (IP) for easy customization and adaptation to different applications (10) Includes patent pending technologies, such as CABAC, run-level, de-blocking filter, etc..., are applied.

技術特色

單一硬體核心就能實現H.264 High Profile與Scalable Video Coding (SVC)標準的解碼器架構，開發成本較低且能維持高效能與高解析度的性能，符合異質網路上對多重規模解碼功能之需求。

應用範圍

(1) 數位電視、DVB-H、CMMB、PMP、多媒體手機等個人隨身的影音播放裝置。 (2) Video Codec相關產品領域。 (3) 視訊串流與監控關鍵零組件。

接受技術者具備基礎建議（設備）

(1) IC Design Tools。 (2) FPGA Platform。 (3) Video Codec相關產品領域。

接受技術者具備基礎建議（專業）

(1) Video Processing. (2) IC Design. (3) Digital Video Coding.

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