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工業技術研究院

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技術名稱: 3DIC元件與模組電路驗證技術

技術簡介

3DIC 主動驗證技術開發(含中介層驗證技術) 新型非揮發性記憶體I/O技術開發

Abstract

none

技術規格

3DIC 主動驗證技術開發(含中介層驗證技術) -TV(Through Via) modeling analysis -TV electrical analysis 新型非揮發性記憶體I/O技術開發 -I/O 開發(≧200MHz,≦30pj/bit/pin @1.8V)

Technical Specification

none

技術特色

3DIC是在晶圓蝕刻出TSV,再填入Via的導電材料如銅、多晶矽、鎢材料形成導電的通道,最後則將晶圓或晶粒薄化再加以堆疊、結合(Bonding),而成為3D IC。 相較於採用Wire Bonding的傳統堆疊封裝,或過去強調效能優勢的SoC設計來說,3D IC的內部連接路徑更短,相對可使晶片間的傳輸速度更快、雜訊更小、效能更佳。 因此,面對長久以來電子產品的需求與發展,始終都是往小型(薄型)化、高度整合、高效率、低成本、低功耗、即時上市(time-to-market)等發展趨勢,3DIC有極佳的優勢。

應用範圍

半導體製造與設計公司、記憶體製造廠商

接受技術者具備基礎建議(設備)

3DIC電路設計繪圖、量測機台操作能力

接受技術者具備基礎建議(專業)

須具半導體製造或封裝能力,或相關應用之設計能力。

技術分類 奈米科技

聯絡資訊

聯絡人:鍾佩翰 奈米電子技術組

電話:+886-3-5912777 或 Email:stephen.chung@itri.org.tw

客服專線:+886-800-45-8899

傳真:+886-3-5917690

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