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工業技術研究院

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技術名稱: Wafer bonding技術

技術簡介

本技術主要開發晶圓級之封裝製程技術,其中包括相關的晶圓對準及接合等製程封裝技術工作,提供MEMS 元件、光電元件及電子元件等晶圓級封裝所需之製程封裝技術。

Abstract

The wafer bonding technology includes wafer-level alignment and bonding of wafer stacks to realize wafer-level packaging (WLP). This tecnology can be used in MEMS, optoelectronic and microelectronic devices wafer-level packaging.

技術規格

Cavity pressure 小於2mbar 接合強度 > 40MPa 接合面可耐KOH蝕刻 > 1 hr.

Technical Specification

Cavity pressure <2 mbar; Bonding strength >40 Mpa; Bonding surface can withstand KOH etching over 1 hr.

技術特色

可進行精確的晶圓級的對準與晶圓接合製程。晶圓接合製程可採用陽極接合、熱壓接合、黏著接合等方式。

應用範圍

微機電元件,如麥克風、加速度計 光電元件,如CMOS Image Sensor等 電子產品堆疊封裝,如DRAM等

接受技術者具備基礎建議(設備)

Mask aligner、Sputter、Wafer bonder.

接受技術者具備基礎建議(專業)

半導體、材料、物理及電子等相關背景。

技術分類 微機電元件

聯絡資訊

聯絡人:陳國彰 智慧微系統科技中心

電話:+886-6-3847136 或 Email:kerwin_c@itri.org.tw

客服專線:+886-800-45-8899

傳真:+886-6-3847294

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