Technology Overview
Multi-chip package unit in G2.5 panel form with ultra-low warp.
Warpage is a key issue for fan-out panel level packaging (FOPLP) and its RDL process. In order to solve the CTE mismatch in the multi-stacks structure, we developed a highly integrated simulation platform, including materials characterization and its databank, manufacturing process parameters, and structural design models.
Applications & Benefits
- This warpage simulation design platform for the experimental design and process integration can afford ultra-low panel level RDL and IC package.
- Package structure stress analysis can help engineers evaluate and select materials.
Ultra-Low warpage design platform.