Supported by the Technology Development Programs of Department of Industrial Technology (DoIT), Ministry of Economic Affairs (MOEA), ITRI and Synopsys Inc. announced on October 21 that they jointly established the AI Chip Design Lab at ITRI headquarters in Hsinchu to help Taiwan’s semiconductor industries gain advantage in the age of AI and 5G technology. The aim is to incentivize more businesses to invest in device-end AI chip technology and help accelerate AI chip development in local semiconductor industries.
Der-Sheng Lin, Deputy Director General of MOEA's Department of Industrial Technology, expressed that MOEA is committed to facilitating collaborations between semiconductor manufacturers and system integrators to develop AI chips and vertical integration applications. The Ministry established the AI on Chip Taiwan Alliance (AITA) last year, and offers subsidies to manufacturers through MOEA’s Global R&D Innovation Partner Program to encourage more industry collaborations and new industrial upgrading. The launch of AI Chip Design Lab, he said, is a very significant milestone as well.
Dr. Pei-Zen Chang, ITRI’s Executive Vice President, pointed out that major ICT manufacturers continue to invest in diverse AIoT application devices, and cognitive, logic, decision-making, and even emotional functions need to be integrated and placed on one chip. He indicated that the AI Chip Design Lab is here to help Taiwan, who is already a major player in the international IT field, secure a crucial role in future developments. Support and services offered by the Lab include helping manufacturers plan out their blueprint and build their foundation, setting up the AI’s “brain”, and making AI chip designs more energy-saving and efficient.
Dr. Chi-Foon Chan, President and Co-CEO of Synopsys, remarked via conference call from Silicon Valley, U.S. that Synopsys is dedicated to helping Taiwan's semiconductor industries upgrade their technology. He expressed that they are honored to establish the AI Chip Design Lab with ITRI and look forward to galvanizing the realization of Taiwan's AI chip industry chain. As a leading global provider of EDA, IP, and software quality and security solutions, Synopsys will continue to work closely with the industry, academia, research institutes, and public sectors to improve Taiwan's AI R&D capabilities and take advantage of new business opportunities.
“Synopsys has increased investment in Taiwan by NT$800 million, expanded its Taiwan R&D team with more than 100 additional headcounts, and actively collaborated with ITRI in planning the AI Chip Design Lab,” said David Lin, Corporate Senior Vice President of Synopsys and Chairman of Synopsys Taiwan. “The goal is to bring in advanced design tools, IP, and verification technology required for AI chips, and develop advanced AI design solutions. At the same time ITRI will collect the actual needs of local design houses and provide integrated design analysis and verification services. The Lab is expected to shorten the time-to-market for AI chips from 1.8-2.5 years to six months and enhance AI chip performance by 25%.”
Dr. Tzi-Cker Chiueh, VP and General Director of ITRI’s Information and Communications Research Laboratories, stressed that the design and verification services offered by the AI Chip Design Lab come from ITRI, while chip design tools will be supplied by Synopsys. IC companies developing AI chips could obtain five types of assistance from this lab: education and training, chip design, software development, system verification, and market information. The Lab is expected to cut down 30-50% of development time for AI chips and significantly lower the design entry barriers for local IC companies.
The AI Chip Design Lab began the platform setup in 2019 and launched its soft opening in October this year, during which it will run test operations on service models and set up an AI SoC reference design platform. The Lab is scheduled to officially come into service in October 2021, and will offer manufacturers services such as AI chip system design, software development and verification.